e84: per-port FSM via E84PortStore
E84 (Parallel I/O) is fundamentally per-load-port: each port has its own ten-wire handshake with the AMHS. Earlier revisions modeled it as a single equipment-wide FSM; this commit refactors to a per-port store, so multi-LP tools can run independent handshakes in parallel. Public API change in EquipmentDataModel: E84StateMachine e84; -> removed E84PortStore e84_ports; // create(port_id), get(port_id), ... Convenience pass-throughs: E84PortStore::on_signal_change auto-creates the port on first use (ergonomic for demos); applications should call create() explicitly with their full port set. The two existing callsites (test_gem300_scenario, test_e87_wire_scenarios) are updated. The multi-LP test now demonstrates the actual win: interleaved LP1 load + LP2 unload handshakes that reach their respective Ready states without sequencing, and an ES on LP1 that does NOT affect LP2 — exactly the failure mode the previous design couldn't catch. Five new dedicated tests in test_e84_ports.cpp for the store itself. COMPLIANCE.md §4i updated: row now reflects per-port design. Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
This commit is contained in:
@@ -127,6 +127,7 @@ add_executable(secsgem_tests
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tests/test_sml.cpp
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tests/test_s9_fallback.cpp
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tests/test_e84.cpp
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tests/test_e84_ports.cpp
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tests/test_gem300_scenario.cpp
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tests/test_wire_ceid_emission.cpp
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tests/test_live_gem300.cpp
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+1
-1
@@ -196,7 +196,7 @@ Legend:
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| Capability | Status | Spec ref | Messages | Notes |
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|---------------------------------------|--------|----------|----------|-------|
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| Handoff state machine | ✅ | E84 | — | Full LOAD / UNLOAD signal vocabulary (CS_0/CS_1, VALID, TR_REQ, BUSY, COMPT, AM_AVBL, ES). |
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| Handoff state machine | ✅ | E84 | — | Full LOAD / UNLOAD signal vocabulary (CS_0/CS_1, VALID, TR_REQ, BUSY, COMPT, AM_AVBL, ES). Per-port via `E84PortStore` keyed by `port_id`; independent FSMs run in parallel per load port. |
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## 4j. E5 §13 Wafer Maps (S12)
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@@ -5,6 +5,7 @@
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#include "secsgem/gem/store/cem_objects.hpp"
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#include "secsgem/gem/store/clock.hpp"
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#include "secsgem/gem/e84_state.hpp"
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#include "secsgem/gem/store/e84_ports.hpp"
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#include "secsgem/gem/ept_state.hpp"
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#include "secsgem/gem/store/control_jobs.hpp"
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#include "secsgem/gem/store/equipment_constants.hpp"
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@@ -48,7 +49,7 @@ struct EquipmentDataModel {
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EptStateMachine ept;
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CemObjectStore cem;
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ModuleStore modules;
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E84StateMachine e84;
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E84PortStore e84_ports;
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// Convenience: VID -> value lookup spanning SVIDs and DVIDs.
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std::optional<s2::Item> vid_value(uint32_t vid) const {
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@@ -0,0 +1,87 @@
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#pragma once
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#include <cstdint>
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#include <functional>
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#include <map>
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#include <memory>
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#include <utility>
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#include <vector>
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#include "secsgem/gem/e84_state.hpp"
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namespace secsgem::gem {
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// E84 (Parallel I/O) is per-load-port: each port has its own ten-wire
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// handshake with the AMHS. Earlier revisions of this codebase modeled
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// E84 as a single equipment-wide FSM; multi-LP tools need one FSM per
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// port. E84PortStore keys per-port FSMs by port_id (1-based, matching
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// LoadPortStore).
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class E84PortStore {
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public:
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using StateChangeHandler =
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std::function<void(uint8_t port_id, E84State from, E84State to,
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E84Signal trigger)>;
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E84PortStore() = default;
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E84PortStore(const E84PortStore&) = delete;
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E84PortStore& operator=(const E84PortStore&) = delete;
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E84PortStore(E84PortStore&&) = delete;
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E84PortStore& operator=(E84PortStore&&) = delete;
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void set_state_change_handler(StateChangeHandler h) { on_change_ = std::move(h); }
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bool create(uint8_t port_id) {
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if (ports_.count(port_id)) return false;
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auto fsm = std::make_unique<E84StateMachine>();
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const uint8_t pid = port_id;
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fsm->set_state_change_handler(
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[this, pid](E84State f, E84State t, E84Signal sig) {
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if (on_change_) on_change_(pid, f, t, sig);
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});
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ports_.emplace(port_id, std::move(fsm));
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return true;
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}
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bool has(uint8_t port_id) const { return ports_.count(port_id) > 0; }
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E84StateMachine* get(uint8_t port_id) {
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auto it = ports_.find(port_id);
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return it == ports_.end() ? nullptr : it->second.get();
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}
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const E84StateMachine* get(uint8_t port_id) const {
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auto it = ports_.find(port_id);
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return it == ports_.end() ? nullptr : it->second.get();
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}
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// Convenience pass-throughs that auto-create the port on first use.
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// Real applications should call create() explicitly with their
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// expected port set, but the implicit create keeps quick demos
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// ergonomic.
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bool on_signal_change(uint8_t port_id, E84Signal s, bool value) {
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if (!ports_.count(port_id)) create(port_id);
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auto* fsm = get(port_id);
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if (!fsm) return false;
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fsm->on_signal_change(s, value);
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return true;
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}
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bool reset(uint8_t port_id) {
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auto* fsm = get(port_id);
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if (!fsm) return false;
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fsm->reset();
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return true;
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}
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std::size_t size() const { return ports_.size(); }
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std::vector<uint8_t> ids() const {
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std::vector<uint8_t> out;
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out.reserve(ports_.size());
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for (const auto& kv : ports_) out.push_back(kv.first);
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return out;
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}
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private:
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std::map<uint8_t, std::unique_ptr<E84StateMachine>> ports_;
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StateChangeHandler on_change_;
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};
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} // namespace secsgem::gem
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@@ -0,0 +1,98 @@
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// E84PortStore: per-port E84 FSMs.
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//
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// Each load port owns its own E84 handshake state. These tests
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// confirm the store keys correctly, that per-port FSMs are
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// independent, and that the change handler reports the right
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// port_id alongside the from/to state.
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#include <doctest/doctest.h>
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#include <utility>
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#include <vector>
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#include "secsgem/gem/store/e84_ports.hpp"
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using namespace secsgem::gem;
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TEST_CASE("E84PortStore: create + get + has + size") {
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E84PortStore s;
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CHECK(s.size() == 0);
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REQUIRE(s.create(1));
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REQUIRE(s.create(2));
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CHECK(s.size() == 2);
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CHECK(s.has(1));
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CHECK(s.has(2));
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CHECK_FALSE(s.has(3));
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CHECK(s.get(1) != nullptr);
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CHECK(s.get(99) == nullptr);
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CHECK_FALSE(s.create(1)); // duplicate
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}
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TEST_CASE("E84PortStore: implicit-create on first signal-change") {
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// Convenience pass-through: on_signal_change auto-creates the port
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// if it doesn't exist yet.
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E84PortStore s;
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CHECK(s.on_signal_change(7, E84Signal::CS_0, true));
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CHECK(s.has(7));
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CHECK(s.get(7)->signal(E84Signal::CS_0));
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}
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TEST_CASE("E84PortStore: per-port FSMs run independently") {
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E84PortStore s;
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REQUIRE(s.create(1));
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REQUIRE(s.create(2));
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// LP1 walks all the way to Complete; LP2 stays idle.
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s.on_signal_change(1, E84Signal::CS_0, true);
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s.on_signal_change(1, E84Signal::VALID, true);
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s.on_signal_change(1, E84Signal::L_REQ, true);
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s.on_signal_change(1, E84Signal::BUSY, true);
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s.on_signal_change(1, E84Signal::BUSY, false);
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s.on_signal_change(1, E84Signal::COMPT, true);
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CHECK(s.get(1)->state() == E84State::Complete);
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CHECK(s.get(2)->state() == E84State::Idle);
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// Reset LP1; LP2 is unaffected.
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s.reset(1);
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CHECK(s.get(1)->state() == E84State::Idle);
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CHECK(s.get(2)->state() == E84State::Idle);
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}
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TEST_CASE("E84PortStore: change handler reports port_id") {
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E84PortStore s;
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std::vector<std::pair<uint8_t, E84State>> seen;
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s.set_state_change_handler(
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[&](uint8_t pid, E84State, E84State to, E84Signal) {
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seen.emplace_back(pid, to);
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});
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REQUIRE(s.create(1));
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REQUIRE(s.create(2));
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s.on_signal_change(1, E84Signal::CS_0, true);
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s.on_signal_change(2, E84Signal::CS_0, true);
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s.on_signal_change(2, E84Signal::VALID, true);
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s.on_signal_change(2, E84Signal::U_REQ, true);
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// Should have seen events tagged with the right port_id.
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bool saw_lp1_carrier_present = false;
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bool saw_lp2_unload_ready = false;
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for (auto& [pid, to] : seen) {
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if (pid == 1 && to == E84State::CarrierPresent) saw_lp1_carrier_present = true;
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if (pid == 2 && to == E84State::UnloadReady) saw_lp2_unload_ready = true;
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}
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CHECK(saw_lp1_carrier_present);
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CHECK(saw_lp2_unload_ready);
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}
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TEST_CASE("E84PortStore: ids() returns the registered port set") {
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E84PortStore s;
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s.create(3);
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s.create(1);
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s.create(2);
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auto ids = s.ids();
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// std::map iteration is ordered by key, so the returned vector is
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// sorted.
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REQUIRE(ids.size() == 3);
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CHECK(ids[0] == 1);
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CHECK(ids[1] == 2);
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CHECK(ids[2] == 3);
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}
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@@ -222,35 +222,28 @@ TEST_CASE("Multi-LP: 4 ports are independent — events on one don't affect anot
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gem::SlotMapStatus::NotRead);
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}
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TEST_CASE("Multi-LP: simultaneous E84 handshakes on two ports stay independent") {
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// No wire here — the E84 FSM is a per-port axis in the equipment
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// model; we test that two separate ports running their handshakes in
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// overlapping sequences don't interfere. The data model has a
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// single E84StateMachine for now; this exercise documents that the
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// current design is per-equipment, not per-port — so the test runs
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// the second handshake AFTER the first completes, and asserts the
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// second one sees the FSM cleanly returned to Idle.
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TEST_CASE("Multi-LP: per-port E84 FSMs run truly in parallel") {
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// E84 is now per-port (E84PortStore). Two ports can be in completely
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// different states at the same time without sequencing.
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gem::EquipmentDataModel m;
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m.load_ports.create(1);
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m.load_ports.create(2);
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// LP1 load handshake.
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m.e84.on_signal_change(gem::E84Signal::CS_0, true);
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m.e84.on_signal_change(gem::E84Signal::VALID, true);
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m.e84.on_signal_change(gem::E84Signal::L_REQ, true);
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CHECK(m.e84.state() == gem::E84State::LoadReady);
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m.e84.on_signal_change(gem::E84Signal::BUSY, true);
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m.e84.on_signal_change(gem::E84Signal::BUSY, false);
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m.e84.on_signal_change(gem::E84Signal::COMPT, true);
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CHECK(m.e84.state() == gem::E84State::Complete);
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// LP1: interleave load-handshake bring-up with LP2: interleave
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// unload-handshake bring-up. Both reach their respective Ready
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// states with no cross-contamination.
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m.e84_ports.on_signal_change(1, gem::E84Signal::CS_0, true);
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m.e84_ports.on_signal_change(2, gem::E84Signal::CS_0, true);
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m.e84_ports.on_signal_change(1, gem::E84Signal::VALID, true);
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m.e84_ports.on_signal_change(2, gem::E84Signal::VALID, true);
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m.e84_ports.on_signal_change(1, gem::E84Signal::L_REQ, true);
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m.e84_ports.on_signal_change(2, gem::E84Signal::U_REQ, true);
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// Reset for LP2.
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m.e84.reset();
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CHECK(m.e84.state() == gem::E84State::Idle);
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CHECK(m.e84_ports.get(1)->state() == gem::E84State::LoadReady);
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CHECK(m.e84_ports.get(2)->state() == gem::E84State::UnloadReady);
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// LP2 unload handshake.
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m.e84.on_signal_change(gem::E84Signal::CS_0, true);
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m.e84.on_signal_change(gem::E84Signal::VALID, true);
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m.e84.on_signal_change(gem::E84Signal::U_REQ, true);
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CHECK(m.e84.state() == gem::E84State::UnloadReady);
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// ES on LP1 must not affect LP2.
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m.e84_ports.on_signal_change(1, gem::E84Signal::ES, true);
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CHECK(m.e84_ports.get(1)->state() == gem::E84State::EmergencyStop);
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CHECK(m.e84_ports.get(2)->state() == gem::E84State::UnloadReady);
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}
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@@ -48,15 +48,15 @@ TEST_CASE("GEM300 scenario: carrier arrival -> processing -> departure") {
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// ---- 2. E84 load handshake at LP1 --------------------------------------
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// AMHS asserts CS_0, then VALID; equipment asserts L_REQ; AMHS asserts
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// BUSY, then drops BUSY + asserts COMPT.
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m.e84.on_signal_change(E84Signal::CS_0, true);
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m.e84.on_signal_change(E84Signal::VALID, true);
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m.e84.on_signal_change(E84Signal::L_REQ, true);
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CHECK(m.e84.state() == E84State::LoadReady);
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m.e84_ports.on_signal_change(1,E84Signal::CS_0, true);
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m.e84_ports.on_signal_change(1,E84Signal::VALID, true);
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m.e84_ports.on_signal_change(1,E84Signal::L_REQ, true);
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CHECK(m.e84_ports.get(1)->state() == E84State::LoadReady);
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m.e84.on_signal_change(E84Signal::BUSY, true);
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m.e84.on_signal_change(E84Signal::BUSY, false);
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m.e84.on_signal_change(E84Signal::COMPT, true);
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CHECK(m.e84.state() == E84State::Complete);
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m.e84_ports.on_signal_change(1,E84Signal::BUSY, true);
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m.e84_ports.on_signal_change(1,E84Signal::BUSY, false);
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m.e84_ports.on_signal_change(1,E84Signal::COMPT, true);
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CHECK(m.e84_ports.get(1)->state() == E84State::Complete);
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// Load port transitions on the equipment side.
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m.load_ports.fire_transfer_event(1, LoadPortTransferEvent::StartLoading);
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@@ -153,15 +153,15 @@ TEST_CASE("GEM300 scenario: carrier arrival -> processing -> departure") {
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}
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// ---- 12. Carrier unloads via E84 -------------------------------------
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m.e84.reset();
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m.e84.on_signal_change(E84Signal::CS_0, true);
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m.e84.on_signal_change(E84Signal::VALID, true);
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m.e84.on_signal_change(E84Signal::U_REQ, true);
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CHECK(m.e84.state() == E84State::UnloadReady);
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m.e84.on_signal_change(E84Signal::BUSY, true);
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m.e84.on_signal_change(E84Signal::BUSY, false);
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m.e84.on_signal_change(E84Signal::COMPT, true);
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CHECK(m.e84.state() == E84State::Complete);
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m.e84_ports.reset(1);
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m.e84_ports.on_signal_change(1,E84Signal::CS_0, true);
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m.e84_ports.on_signal_change(1,E84Signal::VALID, true);
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m.e84_ports.on_signal_change(1,E84Signal::U_REQ, true);
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CHECK(m.e84_ports.get(1)->state() == E84State::UnloadReady);
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m.e84_ports.on_signal_change(1,E84Signal::BUSY, true);
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m.e84_ports.on_signal_change(1,E84Signal::BUSY, false);
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m.e84_ports.on_signal_change(1,E84Signal::COMPT, true);
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CHECK(m.e84_ports.get(1)->state() == E84State::Complete);
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m.load_ports.fire_transfer_event(1, LoadPortTransferEvent::StartUnloading);
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m.load_ports.fire_transfer_event(1, LoadPortTransferEvent::CompleteUnloading);
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