raphael
0e832d6ff7
The biggest single gap I called out in the GEM300 audit — closed.
E84 is the digital handshake between AMHS (Automated Material
Handling System) and the equipment for carrier load/unload. Unlike
the rest of GEM300, this isn't SECS messaging; it's a fixed set of
ten parallel boolean wires that follow a strict sequencing protocol
(E84-0710 §6.3).
Adds:
E84Signal enum CS_0/CS_1/VALID/TR_REQ/BUSY/COMPT/L_REQ/U_REQ/
READY/ES
E84SignalSet 10-bit bitmap with bool get/set
E84State Idle / CarrierPresent / ValidAsserted /
LoadReady / UnloadReady / Transferring /
Complete / EmergencyStop
E84StateMachine re-evaluates state on every signal change,
observable via set_state_change_handler
Joins EquipmentDataModel as `e84` (top-level — there's one per tool,
not per port). ES (emergency stop) dominates regardless of other
signals; COMPT and BUSY override the VALID-handshake states. Same
FSM drives real opto-isolated I/O lines (when wired through an
asio digital input adapter) and the back-to-back test simulation.
Six test cases cover the full load handshake trace (six transitions,
including the transient LoadReady-after-BUSY-drops state), the
unload variant via U_REQ, ES dominance + recovery, reset(), and
no-op suppression for idempotent signal writes.
Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
111 lines
3.7 KiB
C++
111 lines
3.7 KiB
C++
#include <doctest/doctest.h>
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#include <vector>
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#include "secsgem/gem/e84_state.hpp"
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using namespace secsgem::gem;
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TEST_CASE("E84: initial state is Idle with all signals low") {
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E84StateMachine fsm;
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CHECK(fsm.state() == E84State::Idle);
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for (auto s : {E84Signal::CS_0, E84Signal::CS_1, E84Signal::VALID,
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E84Signal::TR_REQ, E84Signal::BUSY, E84Signal::COMPT,
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E84Signal::L_REQ, E84Signal::U_REQ, E84Signal::READY,
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E84Signal::ES}) {
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CHECK_FALSE(fsm.signal(s));
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}
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}
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TEST_CASE("E84: load handshake sequence") {
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E84StateMachine fsm;
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std::vector<E84State> trace;
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fsm.set_state_change_handler(
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[&](E84State, E84State to, E84Signal) { trace.push_back(to); });
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// AMHS asserts CS_0 (port 0 selected).
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fsm.on_signal_change(E84Signal::CS_0, true);
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CHECK(fsm.state() == E84State::CarrierPresent);
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// AMHS asserts VALID.
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fsm.on_signal_change(E84Signal::VALID, true);
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CHECK(fsm.state() == E84State::ValidAsserted);
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// Equipment asserts L_REQ (port is ready to receive).
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fsm.on_signal_change(E84Signal::L_REQ, true);
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CHECK(fsm.state() == E84State::LoadReady);
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// AMHS begins transfer.
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fsm.on_signal_change(E84Signal::BUSY, true);
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CHECK(fsm.state() == E84State::Transferring);
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// AMHS completes. Dropping BUSY transiently returns to LoadReady
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// (VALID + L_REQ still held), then COMPT pushes Complete.
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fsm.on_signal_change(E84Signal::BUSY, false);
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CHECK(fsm.state() == E84State::LoadReady);
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fsm.on_signal_change(E84Signal::COMPT, true);
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CHECK(fsm.state() == E84State::Complete);
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// Six transitions: Idle->CarrierPresent->ValidAsserted->LoadReady->
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// Transferring->LoadReady->Complete.
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CHECK(trace.size() == 6);
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CHECK(trace.back() == E84State::Complete);
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}
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TEST_CASE("E84: unload handshake distinguishes U_REQ vs L_REQ") {
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E84StateMachine fsm;
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fsm.on_signal_change(E84Signal::CS_1, true);
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fsm.on_signal_change(E84Signal::VALID, true);
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fsm.on_signal_change(E84Signal::U_REQ, true);
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CHECK(fsm.state() == E84State::UnloadReady);
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}
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TEST_CASE("E84: ES dominates regardless of other signals") {
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E84StateMachine fsm;
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fsm.on_signal_change(E84Signal::CS_0, true);
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fsm.on_signal_change(E84Signal::VALID, true);
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fsm.on_signal_change(E84Signal::L_REQ, true);
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REQUIRE(fsm.state() == E84State::LoadReady);
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fsm.on_signal_change(E84Signal::ES, true);
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CHECK(fsm.state() == E84State::EmergencyStop);
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// ES persists even as other signals drop.
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fsm.on_signal_change(E84Signal::VALID, false);
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fsm.on_signal_change(E84Signal::CS_0, false);
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CHECK(fsm.state() == E84State::EmergencyStop);
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// Clearing ES returns to whatever the remaining signals indicate.
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// VALID and CS_0 are gone, so even though L_REQ is still held, the
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// handshake collapses to Idle (no carrier present + no VALID).
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fsm.on_signal_change(E84Signal::ES, false);
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CHECK(fsm.state() == E84State::Idle);
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}
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TEST_CASE("E84: reset() drops all signals and returns to Idle") {
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E84StateMachine fsm;
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fsm.on_signal_change(E84Signal::CS_0, true);
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fsm.on_signal_change(E84Signal::VALID, true);
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REQUIRE(fsm.state() != E84State::Idle);
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fsm.reset();
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CHECK(fsm.state() == E84State::Idle);
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CHECK_FALSE(fsm.signal(E84Signal::CS_0));
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CHECK_FALSE(fsm.signal(E84Signal::VALID));
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}
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TEST_CASE("E84: handler suppresses no-op signal-change events") {
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E84StateMachine fsm;
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int calls = 0;
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fsm.set_state_change_handler(
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[&](E84State, E84State, E84Signal) { ++calls; });
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// Setting CS_0 false (already false) doesn't change state.
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fsm.on_signal_change(E84Signal::CS_0, false);
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CHECK(calls == 0);
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// Real change.
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fsm.on_signal_change(E84Signal::CS_0, true);
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CHECK(calls == 1);
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// Setting it true again (idempotent).
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fsm.on_signal_change(E84Signal::CS_0, true);
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CHECK(calls == 1);
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}
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